48 English-speaking jobs in Catania

Senior Analog Layout Engineer leads chip and block level layout for high-performance analog and mixed-signal products. Responsibilities include floorplan activities, power supply strategy, and driving top-level integration. Requires 10+ years of experience leading analog layout activities in complex ICs, fluency in English, and expertise in layout design tools.

The CMMS Maintenance Planner – Ultra Pure Water (UPW) Systems develops and maintains preventive maintenance plans for UPW systems using the Limble CMMS. This role coordinates maintenance schedules, analyzes data, and prepares reports. The ideal candidate has a Bachelor's degree in Engineering, 1-2 years of experience in developing preventive maintenance plans, and experience with CMMS, ERP systems, and data management tools.

Develop digital sub-circuits for System-on-Chip (SoC) based on specifications. Expertise in Verilog/SystemVerilog, synthesis, STA, formal verification, and power analysis required. Collaborate with analog, mixed-signal, and software teams. Contribute to design for testability (DFT) implementation and verification. Generate design documentation and participate in post-silicon validation.

Tecnimont seeks a Civil & Structural Materials & Work Quantities Estimating & Management Specialist to provide integrated solutions for complex plants. The role involves estimating materials and works, issuing accounting documents, and ensuring deliverables meet contractual and company standards.

Lead a team of analog layout engineers responsible for the physical design of analog blocks and systems. Experience with leading a global team of engineers and delivering working silicon for high volume products is required.

Internship focused on developing and validating a robust measurement methodology for junction-to-case thermal resistance (Rth) on power packages. Responsibilities include performing electrical and thermal measurements, analyzing test conditions, and documenting results. Requires a solid background in electronics, circuit analysis, and data analysis.

Senior DFT Designer to develop and implement DFT architectures for complex SoCs. Responsibilities include scan insertion, test compression, memory BIST, and collaboration with cross-functional teams. Requires expertise in DFT methodologies, ATPG tools, UPF/CPF-based DFT, and scripting languages.

This internship focuses on developing and validating a robust measurement methodology for junction-to-case thermal resistance (Rth) on power packages. Interns will perform electrical and thermal measurements, analyze test conditions, and propose an optimized measurement procedure.

Mixed-Signal Verification Lead ensures high-quality SOC designs. Develops verification strategies, plans, and test cases for mixed-signal systems. Creates functional and AMS models for verification.

Senior DFT Designer to develop and implement DFT architectures for complex SoCs. Responsibilities include scan insertion, test compression, BIST strategies, and collaboration with cross-functional teams. Requires expertise in DFT methodologies, ATPG tools, UPF/CPF-based DFT, and Verilog/SystemVerilog.

Lead and execute the full digital IC design flow for complex System-on-Chip (SoC) including specification definition, RTL coding, synthesis, STA, formal verification, and power analysis. Collaborate with analog, mixed-signal, and software teams. Mentor junior engineers and contribute to design process improvement.

Senior Analog IC Design Engineer will design, verify, and validate power management ICs for computing platforms. Responsibilities include transistor-level design, circuit topology evaluation, layout oversight, design documentation, and test support.

Site Manager for renewable energy assets in Sicily. Oversee safe and optimal performance of plants, manage contractors, and ensure compliance with HSQE standards.

Cloud Engineer to design, develop, and deploy cloud-based systems. Collaborate with teams to evaluate cloud solutions, modify existing systems, and educate on new technologies.

Lead and execute the full digital IC design flow for complex System-on-Chip (SOC), including specification definition, architectural design, RTL coding, synthesis, STA, formal verification, and power analysis. Collaborate with analog, mixed-signal, and software teams to define interfaces, optimize system performance, and ensure seamless integration. Develop and implement innovative digital architectures and design methodologies to meet challenging performance, power, and area targets.

NXP is seeking a Junior Layout Engineer to deliver Analog layout blocks and participate in power supply and signal distribution strategies.

Sr Staff Digital Design Engineer needed for full-time/permanent role. Develop, debug, and verify digital designs in pre and post silicon environment. Write tests, manage design blocks, and research new tools. Requires BSc/MSc in EE/ECE and 10+ years of industry experience. Proficient in Verilog, System Verilog, and design tool flows.

Senior Analog Engineer responsible for the design, verification, and validation of power management ICs. Duties include transistor-level design, defining IC architectures, overseeing mask layout, and executing lab validation testing. Requires expertise in BCD design, analog building blocks, and switch-mode power conversion topologies. Familiarity with Cadence design tools and excellent communication skills are essential.

Site Manager for renewable energy assets in Sicily. Oversees safe and optimal performance of power plants, manages contractors, and ensures adherence to HSQE standards. Responsibilities include technical oversight, budget management, and reporting. Requires experience in the renewables industry, project management, and contractor management.

Senior Configuration Manager to lead CM activities on complex programs, including software and supply management. Develop and maintain CM plans, run change control boards, conduct audits, and ensure baselines and traceability.