Internship with Ambarella's VLSI Design Team focusing on 2nm technology across core IPs. Topics include DDR memory control, Video Coding, RISC-V development, and EDA tool development. Requires basic ASIC front-end knowledge and proficiency in Verilog/SystemVerilog.
Senior Power Electronics Engineer to lead MVDC power conversion system design from concept to qualification. Responsibilities include converter design, topology selection, simulation, and hardware validation at medium voltage levels.