To strengthen their existing IC design team, my client are currently looking for a junior digital IC..The engineer requested for this position will be responsible for design, simulation and full validation..at RT-Level of core functional blocks Implementation of RTL-to-Syn IC design flow, including timing/..at RT-Level of core functional blocks Implementation of RTL-to-Syn IC design flow, including timing/..The engineer requested for this position will be responsible for design, simulation and full validation